1. Field of the Invention
This invention relates to a plasma display panel, and more particularly to a method and apparatus for driving a plasma display panel that is adaptive for preventing a spot misfire and a miswriting.
2. Description of the Related Art
Generally, a plasma display panel (PDP) excites and radiates a phosphorus material using an ultraviolet ray generated upon discharge of an inactive mixture gas such as He+Xe, Ne+Xe or He+Ne+Xe, to thereby display a picture. Such a PDP is easy to be made into a thin-film and large-dimension type. Moreover, the PDP provides a very improved picture quality owing to a recent technical development.
Referring to FIG. 1, a discharge cell of a conventional three-electrode, AC surface-discharge PDP includes a scan electrode 30Y and a sustain electrode 30Z provided on an upper substrate 10, and an address electrode 20X provided on a lower substrate 18. Each of the scan electrode 30Y and the sustain electrode 30Z includes transparent electrodes 12Y and 12Z, and metal bus electrodes 13Y and 13Z having smaller line widths than the transparent electrodes 12Y and 12Z and provided at one edge of the transparent electrodes 12Y and 12Z.
The transparent electrodes 12Y and 12Z are usually formed from indium-tin-oxide (ITO) on the upper substrate 10. The metal bus electrodes 13Y and 13Z are usually formed from a metal such as chrome (Cr), etc. on the transparent electrodes 12Y and 12Z to thereby reduce a voltage drop caused by the transparent electrodes 12Y and 12Z having a high resistance.
On the upper substrate 10 provided, in parallel, with the scan electrode 30Y and the common sustain electrode 30Z, an upper dielectric layer 14 and a protective film 16 are disposed. Wall charges generated upon plasma discharge are accumulated onto the upper dielectric layer 14. The protective film 16 prevents a damage of the upper dielectric layer 14 caused by a sputtering during the plasma discharge and improves the emission efficiency of secondary electrons. This protective film 16 is usually made from magnesium oxide (MgO).
A lower dielectric layer 22 and barrier ribs 24 are formed on the lower substrate 18 provided with the address electrode 20X. The surfaces of the lower dielectric layer 22 and the barrier ribs 24 are coated with a phosphorous material 26. The address electrode 20X is formed in a direction crossing the scan electrode 30Y and the sustain electrode 30Z. The barrier rib 24 is formed in parallel to the address electrode 20X to thereby prevent an ultraviolet ray and a visible light generated by a discharge from being leaked to the adjacent discharge cells. The phosphorous material 26 is excited by an ultraviolet ray generated during the plasma discharge to generate any one of red, green and blue visible light rays. An inactive mixture gas for a gas discharge is injected into a discharge space defined between the upper and lower substrate 10 and 18 and the barrier rib 24.
Such a PDP makes a time-divisional driving of one frame, which is divided into various sub-fields having a different emission frequency, so as to realize gray levels of a picture. Each sub-field is again divided into an initialization period for initializing the entire field, an address period for selecting a scan line and selecting the cell from the selected scan line and a sustain period for expressing gray levels depending on the discharge frequency. Herein, the initialization period is again divided into a set-up interval supplied with a rising ramp waveform and a set-down interval supplied with a falling ramp waveform.
For instance, when it is intended to display a picture of 256 gray levels, a frame interval equal to 1/60 second (i.e. 16.67 msec) is divided into 8 sub-fields SF1 to SF8 as shown in FIG. 2. Each of the 8 sub-field SF1 to SF8 is divided into an initialization period, an address period and a sustain period as mentioned above. Herein, the initialization period and the address period of each sub-field are equal for each sub-field, whereas the sustain period and the number of sustain pulses assigned thereto are increased at a ratio of 2n (wherein n=0, 1, 2, 3, 4, 5, 6 and 7) at each sub-field.
FIG. 3 shows a driving waveform of the PDP applied to two sub-fields. In FIG. 3, Y represents the scan electrode; Z denotes the sustain electrode; and X denotes the address electrode.
Referring to FIG. 3, the PDP is divided into an initialization period for initializing the full field, an address period for selecting a cell, and a sustain period for sustaining a discharge of the selected cell for its driving.
In the initialization period, a rising ramp waveform Ramp-up is simultaneously applied to the entire scan electrodes Y in a set-up interval. This rising ramp waveform Ramp-up causes a weak discharge within cells at the full field to generate wall charges within the cells. The rising ramp waveform Ramp-up rises from a sustain voltage Vs until a sum value of a set-up voltage Vsetup with the sustain voltage Vs.
In the set-down interval, after the rising ramp waveform Ramp-up was supplied, a falling ramp waveform Ramp-down falling from a positive voltage lower than a peak voltage of the rising ramp waveform Ramp-up is simultaneously applied to the scan electrodes Y. The falling ramp waveform Ramp-down causes a weak erasure discharge within the cells, to thereby erase spurious charges of wall charges and space charges generated by the set-up discharge and uniformly leave wall charges required for the address discharge within the cells of the full field. In real, the falling ramp waveform Ramp-down falls from the sustain voltage Vs until a negative voltage −Vy so that desired wall charges can be left during the set-down interval.
In the address period, a negative scanning pulse scan is sequentially applied to the scan electrodes Y and, at the same time, a positive data pulse data is applied to the address electrodes X. A voltage difference between the scanning pulse scan and the data pulse data is added to a wall voltage generated in the initialization period to thereby generate an address discharge within the cells supplied with the data pulse data. Wall charges are formed within the cells selected by the address discharge.
Meanwhile, a positive direct current voltage having a sustain voltage level Vs is applied to the sustain electrodes Z during the set-down interval and the address period.
In the sustain period, a sustaining pulse sus is alternately applied to the scan electrodes Y and the sustain electrodes Z. Then, a wall voltage within the cell selected by the address discharge is added to the sustain pulse sus to thereby generate a sustain discharge taking a surface-discharge type between the scan electrode Y and the common sustain electrode Z whenever each sustain pulse sus is applied. Finally, after the sustain discharge was finished, a erasing ramp waveform erase having a small pulse width is applied to the sustain electrode Z to thereby erase wall charges left within the cells.
In the set-up interval of such a convention PDP, the scan electrode Y is supplied with a positive voltage while the sustain electrode Z is supplied with a negative voltage (or a ground voltage). Accordingly, in the set-up interval, negative wall charges are formed at the scan electrode Y while positive wall charges are formed at the sustain electrode Z as shown in FIG. 4. The falling ramp waveform Ramp-down falling from a positive voltage lower than a peak voltage of the rising ramp waveform Ramp-up are supplied in the set-down interval. Thus, spurious wall charges formed excessively and non-uniformly are erased to thereby reduce the wall charges within the cell into a predetermined amount.
Subsequently, in the address period, the scan electrode Y is supplied with a negative voltage while the sustain electrode Z is supplied with a positive voltage. At this time, a voltage value (having a negative polarity) of wall charges formed in the set-down interval is added to a negative voltage value applied to the scan electrode Y, to thereby cause an address discharge.
The conventional PDP driven as mentioned above does not make a stable address discharge until desired wall charges are formed in the initialization period. However, in the conventional PDP, desired wall charges are not formed in the initialization period depending upon a property of the panel, and thus a spot misfire or a miswriting occurs.
More specifically, when wall charges are normally formed in the initialization period, negative wall charges are formed at the scan electrode Y while positive wall charges are formed at the sustain electrode Z as shown in FIG. 4. However, due to problems of the panel property, etc., positive wall charges are formed at the scan electrode Y of a portion of discharge cells during the set-down interval as shown in FIG. 5. In other words, the falling ramp waveform Ramp-down falls until a negative voltage −Vy in the set-down interval. At this time, positive wall charges are formed at the scan electrode Y provided at the portion of discharge cells. If positive wall charges are formed at the scan electrode Y as mentioned above, then a spot misfire or a miswriting is generated to thereby cause a deterioration of picture quality in the PDP.